Seven-Level Inverter Topology with Fewer Switching Components

Abstract

This work proposed a 7-level Inverter structure with minimum power components and controlling with pulse width modulation (PWM) techniques. This topology has three times the greater capacity for voltage boosting. The aim of this study is achieved using a single voltage source, eight switches, two diodes, and two capacitors. Three times voltage boosting, a small number of switches, reduced voltage stress, and a self-balanced capacitor is the main characteristics of this topology. The selective harmonic elimination pulse width modulation SHE-PWM technique, which is based on genetic algorithm optimization, is also used to isolate or eliminate undesirable low-order harmonics of the output voltage. To demonstrate the aforementioned benefits, a simulation was performed using MATLAB SIMULINK, and the corresponding THD results were compared with various modulation indices.